Embedded Coder Support Package for Texas Instruments AM26X Processors
Examples
Table of Contents
Examples
Control
ADC BURST MODE EPWM
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ADC BURST MODE OVERSAMPLING
Description:
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Output
ADC DIFFERENTIAL MODE
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ADC MULTIPLE SOC EPWM
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ADC SOC EPWM
Description:
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ADC PPB DELAY
Description:
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ADC PPB OFFSET
Description:
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ADC SOC CONTINUOUS
Description:
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ADC SOC Software
Description:
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ADC SOC OVERSAMPLING
Description:
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ADC SOC SOFTWARE SYNC
Description:
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CMPSS Asynchronous Trip
Description:
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CMPSS External Mode
Description:
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ECAP Capture PWM
Description:
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ECAP APWM Mode
Description:
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EPWM Chopper:
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EPWM deadband
Description:
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EPWM Synchronization
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EPWM TRIP ZONE
Description:
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EPWM HR DEADBAND SFO
Description:
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EPWM HR DUTY CYCLE SFO
Description:
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EPWM HR PHASE SHIFT SFO
Description:
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EPWM XCMP Multiple Edges
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GPIO INPUT INTERRUPT
Description:
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GPIO LED BLINK
Description:
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UART echo
Description:
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EQEP Direction Position
Description:
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SDFM EPWM SYNC
Description:
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SDFM Filter Sync CPU Read
Description:
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SDFM Filter Sync CPU Read Single Channel
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MCAN External Read Write
Description:
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MCAN Internal Lopback
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MSPI Loopback polling
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MCSPI External Read Write:
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DAC Ramp Wave
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DAC Square Wave
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DAC Constant Voltage
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External Mode
Description:
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PIL
Description:
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Set Up CAN Communication with Target Hardware
XCP over CAN
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Control
ADC BURST MODE EPWM
Description:
The ADC Burst Mode EPWM example sets up ePWM0 to periodically trigger a burst mode conversion of burst size 3 on ADC1 for conversion of inputs on Channel 0, Channel 1, Channel 2 and Channel 3. The interrupt ISR is used to read the results of inputs on the various channels
Example path:
examples\block_examples\adc\adc_burst_mode_epwm
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Output:
ADC BURST MODE OVERSAMPLING
Description:
This example sets up ePWM0 to periodically trigger conversions on ADC1 for inputs on channel 0, channel 1 and channel 3. The burst mode conversions are configured for SOC's that will be converting the analog values from channel 3. The ISR is configured to read the conversions results from all three channels
Example path:
examples\block_examples\adc\adc_burst_mode_oversampling
Output
ADC DIFFERENTIAL MODE
Description:
This example sets up ePWM0 to periodically trigger SOC0 and SOC1 on ADC1 for conversion of inputs on ADC_AIN0 and ADC_AIN1 in differential modes(ADC_AIN0-ADC_AIN1) on SOC0 and (ADC-AIN1-ADC_AIN0) on SOC1
Example path:
examples\block_examples\adc\adc_differential_mode
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ADC MULTIPLE SOC EPWM
Description:
This example sets up ePWM0 to periodically trigger conversions SOC0, SOC1, SOC2 on both ADC1 and ADC2. This example demonstrates multiple ADCs working together to process a batch of conversions
Example path:
examples\block_examples\adc\adc_multiple_soc_epwm
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Output:
ADC SOC EPWM
Description:
The ADC SOC EPWM example demonstarated periodic triggering of conversion on ADC1 by EPWM0. For ADC1, SOC 0 is what gets triggered by EPWM0. The SOC0 sample on channel 0 of ADC1. Additionally, ADCINT1 is configured to generate an interrupt with SOC0 being the source of this interrupt. The ISR that gets called on receiving the interrupt reads SOC0 results, after which it clear ADC1INT1 flag
Example path:
examples\block_examples\adc\adc_soc_epwm
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ADC PPB DELAY
Description:
This example demonstrates the PPB delay time stamp feature of ADC, The PPBs in ADC offer timestamping the delay between SOC conversion and trigger for SOC
Example path:
examples\block_examples\adc\adc_ppb_delay
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ADC PPB OFFSET
Description:
This example demonstrates the PPB offset feature of the Post Processing Block of ADC. The PPB offset feature is as follows:
1) PPB Calibration Offset: This is used for setting calibration offset of SOC result, ADC SOC result = ADC result - PPB Calibration value
2) PPB Reference Offset: This is used to calculate an offset from a given reference, PPB result corresponding to given SOC = ADC result - PPB reference
Example path:
examples\block_examples\adc\adc_ppb_offset
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ADC SOC CONTINUOUS
Description:
This example converts ADC1 Channel 0 on all its SOC configurations, acheiving full sampling rate on input signal on given channel
Example path:
examples\block_examples\adc\adc_soc_continuous
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Output:
ADC SOC Software
Description:
This example uses the ADC to perform an ADC SOC conversion triggered by software. The configured ADC module is ADC0, and SOC0 is to be triggered by software. Additionally, ADCINT1 is enabled and is configured to be generated at end of conversion of SOC0. This examples demonstartes forcing SOC0 through software and then capturing ADC results
Example path:
examples\block_examples\adc\adc_soc_software
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ADC SOC OVERSAMPLING
Description:
This example shows oversamping on a given ADC channel, periodically triggered by EPWM. ADC1 Channel 2 is sampled by SOC (2-5) and are triggered by EPWMSOCA along with SOC 0 (sampling channel 0) and SOC 1 (sampling Channel 1).
Example path:
examples\block_examples\adc\adc_soc_oversampling
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ADC SOC SOFTWARE SYNC
Description:
This example shows synchronous operation on ADC1 and ADC2 trigger by a software forced by toggling a GPIO. The example uses a GPIO loopb into the INPUTBAR[5] as trigger for the SOC in the given ADC and uses software to toggle to the loopback GPIO trigger the conversions.
Example path:
examples\block_examples\adc\adc_soc_software_sync
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CMPSS Asynchronous Trip
Description:
This example enables the CMPSS High comparator and feeds the asynchronous output to GPIO and EPWM. The asynchronous CTRIPOUTH signal is fed to the XBAROUT0 pin and CTRIPH to EPWM0B. CMPSS is configured to generate trip signals to trip the EPWM signals. CMPIN1P is used to give positive input and internal DAC is configured to provide the negative input.
Example path:
examples\block_examples\cmpss\cmpss_asynchronous_trip
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CMPSS External Mode
Description:
This example configures a high comparator, with the negative input source being Internal DAC and the positive input source being a ramp wave fed to
DAC. The comparator status value is being monitored through the scope. The STS value is 0 as long as the voltage on the positive pin is lesser than the voltage on the negative pin. Once the value in the positive pin exceeds 1.65V(2048) the STS value becomes 1. This example is used with external mode that allows monitoring of the output values.
Example path:
examples\block_examples\cmpss\cmpss_external_mode
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Output
ECAP Capture PWM
Description:
This example configures ECAP, to capture the timestamp between the rising and falling edges of EPWM output. Two EPWM modules are configured with a 300 phase shift.
ECAP0 capturess EPWM0 output, and ECAP1 captures EPWM1 output.
Example path:
examples\block_examples\ecap\ecap_capture
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ECAP APWM Mode
Description:
This example configures the ECAP in APWM mode to generate a PWM signal. The compare and period values are specified in such a manner as to output a 50% duty cycle EPWM waveform.
Example path:
examples\block_examples\ecap\ecap_apwm
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EPWM Chopper:
Description:
This example allows a carrier signal to modulate PWM waveform generated by action-qualifier and dead-band submodule, by configuring Chopping(carrier) frequency, programmable puse width of first pulse and duty cycle
Example path:
examples\block_examples\epwm\epwm_chopper
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EPWM deadband
Description:
The EPWM Deadband example is used to showcase the features of deadband submodule. 6 EPWM modules are configured with varying deadband features and EPWM0 is taken as the reference whose Deadband is disabled
Example path:
examples\block_examples\epwm\epwm_deadband
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EPWM Synchronization
Description:
The EPWM Synchronization example is used to showcase the synchronization feature of EPWM. 5 EPWM modules are configured with EPWM 0 taken as reference and other EPWM modules are phase shifted with respect to the first EPWM module. The sync in source for EPWM 1-EPWM 4 is EPWM 0 sync-out signal. On receiving this sync-in source, these EPWM module counter value will start counting from the phase shift value up until the configured period value.
Example path:
examples\block_examples\epwm\epwm_deadband
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EPWM TRIP ZONE
Description:
This example configures EPWM9 and EPWM1 using trip zone sudmodule. EPWM9 has TZ1 as one shot trip source and EPWM1 has TZ1 as cycle-by-cycle trip source. On receiving the trip trigger, EPWM9 output configured for one-shot trip will change to trip state forever. EPWM1 output configured for cycle-by-cycle will trip on receiving the epwm trigger and will recover when the event configured for clearing CBC latch occurs.
Example path:
examples\block_examples\epwm\epwm_trip_zone
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EPWM HR DEADBAND SFO
Description:
This example modifies MEP control registers to show edge displacement for high-resolution deadband with ePWM in up-count mode due to HRPWM control extension of respective module
Example path:
examples\block_examples\epwm\hrpwm_deadband_sfo
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EPWM HR DUTY CYCLE SFO
Description:
This example modifies MEP control registers to show edge displacement for high-resolution duty cycle with ePWM in up-count mode due to HRPWM control extension of respective module
Example path:
examples\block_examples\epwm\hrpwm_duty_cycle_sfo
Model:
EPWM HR PHASE SHIFT SFO
Description:
This example modifies MEP control registers to show edge displacement for high-resolution phase shift with ePWM in up-count mode due to HRPWM control extension of respective module
Example path:
examples\block_examples\epwm\hrpwm_phase_shift_sfo
Model:
EPWM XCMP Multiple Edges
Description:
This example uses the ePWM module to generate multiple edges in a pwm cycle. Three insatnces of PWM are used:
1) EPWM0 XCMP feature is disabled and it generates waves with 50% duty cycle
2) EPWM1 XCMP feature is enabled, and the ACTIVE as well as the three SHADOW set registers are used:
- Using shadow set 3, waves with duty cycle 50% is generated for 5 cycles for both output channels
- Using shadow set 2, waves with duty cycle 0% is generated for 8 cycles for both output channels.
- Using shadow set 1, waves with duty cycle 20% for channel A and 40% for channel B is generated and this continues.
3) EPWM2 XCMP feature is enabled, and only the ACTIVE set regisetrs are used
Example path:
examples\block_examples\epwm\epwm_xcmp_multiple_edges
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GPIO INPUT INTERRUPT
Description:
This example configures a GPIO pin in input mode and configures it to generate interrupt on rising edge. The application reads the input pin state and displays it in the UART console everytime the interrupt gets triggered(SW4 is pressed)
Example path:
examples\block_examples\gpio\gpio_input_interrupt
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Output:
GPIO LED BLINK
Description:
This example configures a GPIO pin connected to an LED on the EVM in output mode.The example toggles the GPIO LED on/off
Example path:
examples\block_examples\gpio\gpio_led_blink
Model:
UART echo
Description:
This example features the working of the UART READ and UART WRITE operation. Here the UART Read block is configured to read 8 characters and echos back the same into the UART port using the UART WRITE block.
Example path:
examples\block_examples\uart\uart_echo
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Output:
EQEP Direction Position
Description:
This example provides Direction and position measurements using the capture unit and speed measurement using unit timeout of the EQEP module. EPWM is used to generate the quadrature input of the EQEP. GPIO can optionally be added to give the index signal to the EQEP.
Example path:
examples\block_examples\eqep\eqep_direction_speed
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SDFM EPWM SYNC
Description:
This SDFM example reads filter data from CPU within ISR. EPWM1 SOCA is used to synchronize all four SDFM filters. All 4 filters use SD1 clock. EPWM0_B is used to generate SDFM clock.
Example path:
examples\block_examples\sdfm\sdfm_epwm_sync
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SDFM Filter Sync CPU Read
Description:
This is an SDFM example that reads filter data from CPU, SDFM filter data is read from ISR. All 4 filters use their respective channel clock.
Example path:
examples\block_examples\sdfm\sdfm_filter_sync_cpu_read
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SDFM Filter Sync CPU Read Single Channel
Description:
In this example the filter data of a signle SDFM channel is read from CPU. Only SDFM0 Filter Channel 1 is configured.
Example Path:
examples\block_examples\sdfm\sdfm_filter_sync_cpuread_single_channel
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Output:
MCAN External Read Write
Description:
This example demonstrates (tested on) the CAN message communication to external PC via PCAN-USB. Instance MCAN0 is set as a Commander in Transmit Mode. Message is transmitted and received back from external PC via PCAN-USB. Messages configured in the model are trasmitted continuously, users can manually send messages from external PC. Upon receiving a message an interrupt gets generated for new data, and the received message is printed out on the UART console.
Example Path:
examples\block_examples\mcan\mcan_external_read_write
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MCAN Internal Lopback
Description:
This example demonstrates the CAN message transmission and reception in digital loop back mode. Message is transmitted and received back internally using internal loopback mode.
Example path:
examples\block_examples\mcan\mcan_internal_loopback
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